This application relies for priority upon Korea Patent Application No. 2001-40686, filed on Jul. 7, 2001, the entire contents of which are hereby incorporated herein by reference in their entirety for all purposes as if fully set forth herein.
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device and forming an interlayer dielectric film, and more particularly, to a method for forming an interlayer dielectric film using high-density plasma.
2. Description of the Related Art
As the integration density of semiconductor devices increases, the distance between devices gets narrower. Thus the critical dimensions of the gate of a MOS transistor, which is one of the main constituents for a semiconductor device, become very small. As a result, the distance between gates becomes shorter. Moreover, since self-aligned contacts are made in highly integrated semiconductor devices such as DRAM cells, the height of a gate can be sufficiently increased, but the depth of a gap between gates is comparatively deep compared to the width of the gate. In this regard, it has been a matter of concern to fill a gap between gates with an insulating film.
Borophospho-silicate glass, which has a high flowability at high temperature; has usually been used as an interlayer dielectric film formed between gates, but it cannot be used during a process of fabricating a highly integrated semiconductor device in which a high temperature process is not available. Instead, an interlayer dielectric film formed of high-density plasma has been used in fabricating a semiconductor device. This interlayer dielectric film is obtained by depositing a silicon oxide film to a predetermined thickness by chemical vapor deposition (CVD) using high-density plasma (HDP) after a gate is formed, removing the silicon oxide film through a wet-etching method, and finally, forming a silicon oxide film thereon by the CVD using HDP.
However, when using the interlayer dielectric film formed as described above, voids due to porous defects are easily formed between gates (refer to FIG. 11), which can cause physical cracking around the voids during the subsequent process of forming films such as a bit line, or degradation of the electric device""s characteristics, e.g., a short circuit in a gate line, after the completion of a semiconductor device.
To solve the above problem, an objective of the present invention is to provide methods for fabricating a semiconductor device and forming an interlayer dielectric film using high-density plasma, so that a void does not occur between gates when forming an interlayer dielectric film after the formation of a gate.
In order to achieve the above objective, there is provided a method for fabricating a semiconductor device. In the method, an isolation insulating film is formed on a semiconductor wafer and gates separated by a gap having a predetermined distance are formed on an active region. Next, a first interlayer dielectric film is deposited to a predetermined thickness on the semiconductor wafer having the gates, so that the gaps between the gates are not completely or sufficiently filled. Then, a sputtering etch is performed entirely on a surface of the first interlayer dielectric film to etch a predetermined thickness of the first interlayer dielectric film. Thereafter, the first interlayer dielectric film is partially removed through isotropic etching. Then, a second interlayer dielectric film is deposited on the first interlayer dielectric film so that the gaps between the gates are completely filled.
Here, the isolation insulating film formed on a semiconductor wafer is formed by forming a gate dielectric film on the active region of the semiconductor wafer, forming a gate conductive film on the gate dielectric film, forming a gate pattern by patterning the gate conductive film and forming a spacer dielectric film along the sidewall of the gate pattern. Also, when the gate conductive film is formed, an insulating film is formed as a mask layer on the gate conductive film, so that a self-aligned contact can be easily made after the formation of the gate pattern.
The first interlayer dielectric film is preferably formed of a silicon oxide film having excellent step coverage and fast deposition rate by chemical vapor deposition using a high-density plasma. Silane gas (SiH4) is beneficially used as silicon source gas in the silicon oxide film.
After the first interlayer dielectric film is completed, a sputtering etch is performed to etch a predetermined thickness of the first interlayer dielectric film in situ. At this time, it is preferable to use helium gas or oxygen gas as an atmospheric gas during the sputtering etch, so that the plasma can be easily generated and the filling characteristics and particle characteristics of the silicon oxide film can be enhanced.
Thereafter, the silicon oxide film formed on the semiconductor wafer is partially removed by a wet-etching method, so that an irregular deposition made during the deposition process using plasma is removed and the profile of the pattern becomes round, to be easily filled during a subsequent process of depositing another insulating film thereon.
Then, a second interlayer dielectric film is deposited to entirely fill the gap between gate patterns. Here, it is preferable that a silicon oxide film is used as the second interlayer dielectric film and the deposition is performed by high-density plasma chemical vapor deposition, so that the time needed for the deposition is reduced.
As described above, in a method of fabricating a semiconductor device, after the formation of the gate patterns, an interlayer dielectric film is obtained by forming a silicon oxide film using high-density plasma and then, performing a sputtering etch thereon using He or O2 gas in situ. Therefore, the gap between gate patterns can be filled without a void, thereby enhancing physical reliability and electric stability of a semiconductor device.
Meanwhile, in order to achieve the above objective, there is provided a method of forming an interlayer dielectric film using high-density plasma on a semiconductor wafer, using an apparatus for fabricating a semiconductor device. Here, the apparatus of fabricating a semiconductor device includes a reactor having a wafer supporter on which a semiconductor wafer is placed and a gas supplier for supplying reactant gas to the semiconductor wafer, and is used for generating high-density plasma for chemical vapor deposition. To form an interlayer dielectric film, the semiconductor wafer having a predetermined pattern is placed in the reactor. Then, a reactant gas is supplied to the semiconductor wafer in the reactor while the reactor is maintained at a low pressure. Next, the reactant gas is changed into a plasma state and the plasmic reactant gas is brought into contact with the surface of the semiconductor wafer, so that an interlayer dielectric film is formed. Thereafter, an atmospheric gas is provided into the reactor and then, a sputtering etch is performed on the interlayer dielectric film by changing the atmospheric gas into plasma and colliding the same against the wafer surface.
Here, it is preferable that silane gas (SiH4) and oxygen gas (O2) are used as the reaction gas, and more oxygen gas (O2) than silane gas (SiH4) is supplied to stably form a silicon oxide film. At this time, the silane gas (SiH4) is supplied at a flow rate of 30xcx9c300 sccm. To obtain the favorable characteristics of the silicon oxide film, it is preferable that oxygen gas (O2) and helium gas (He) are supplied as reactant auxiliary gases. Also, at this time, the oxygen gas (O2) is supplied at a flow rate of 50xcx9c500 sccm and the helium gas (He) is supplied at a flow rate of 50xcx9c1000 sccm.
During the deposition of the silicon oxide film, gases supplied in the reactor can be changed to a plasmic state by applying to the reactor radio frequency (RF) power, which is high-frequency power, in the range of 500xcx9c1500 W. Also, low-frequency power, which is 100xcx9c1000 KHz, is applied to the reactor in the range of 2500xcx9c3500 W, so that conditions for generating a high-density plasma are enforced.
Here, it is preferable that the high-frequency power is applied to the wafer supporter, and the low-frequency power is applied to the upper wall of the reactor, and the low-frequency power level is greater than the high-frequency power level.
During the sputtering etch, either oxygen gas (O2) or helium gas (He) is used as the environmental gas. At this time, the oxygen gas (O2) is supplied at a flow rate of 0xcx9c500 sccm and the helium gas (He) is supplied at a flow rate of 0xcx9c1000 sccm. Further, the high frequency power, which is radio frequency power, and the low-frequency power, which is 100xcx9c1000 KHz, are supplied to the reactor at the same time.
Also, the high-frequency power is applied to the wafer supporter in the range of 500xcx9c3000 W, and the low-frequency power is applied to the upper wall of the reactor in the range of 3500xcx9c5000 W. At this time, the low-frequency power level is greater than the high-frequency power level.